COE 202 - Digital Logic Design Fall 2021 - Term 211 |
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Office: Building 22, Room 410-2, Phone: 4642 Syllabus | Lectures | Exercises | Tools Announcements Midterm Exam: Saturday, October 23, 2021, at 10 AM Final Exam: To be announced Assistant Saud Al Abdulal Email: s201848100@kfupm.edu.sa Any question related to grading should be directed to the teaching assistant Textbook Alan B. Marcovitz, Introduction to Logic Design, third edition, McGraw Hill, 2010 Catalog Description Introduction to information representation and number systems. Boolean algebra and switching theory. Manipulation and minimization of completely and incompletely specified Boolean functions. Propagation delay, timing diagrams. Combinational circuit design using multiplexers, decoders, comparators, and adders. Sequential circuit analysis and design, basic flip-flops, clocking and timing diagrams. Registers, counters, ROMs, PALs, PLAs, and FPGAs. Introduction to Verilog. Prerequisite: PHYS 102 Course Learning Outcomes
Academic Honesty View important information on academic honesty Previous Exams
Grading Scheme Assignments: 15% Quizzes: 15% Midterm Exam: 30% Final Exam: 40%
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Last Updated: Thursday September 16, 2021, by Dr. Muhamed Mudawar |