Research
Research
Interests
Dr. Bouhraoua research
interests span several domains. The following is a non-exhaustive list of
research areas:
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High performance Computer
Architecture
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Digital Systems Design
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Embedded Systems
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Networks-on-Chips and
Systems-on-Chips
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Robot Systems and Swarm of
Robots
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High performance
Architecture for Cryptography
-
Secure Communication
Systems
Publications
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A. Bouhraoua and Metub Al-Shammari,
"A Fundamentally Secure Payment Device Interfaced to Regular PCs",
Accepted at the 2008 IEEE Region 5 Conference, 17-20 April, 2008, Kansas
City, USA. (pdf)
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A. Bouhraoua and Mohammed
E.S. El-Rabaa, "Addressing Heterogeneous Bandwidth Requirements in Modified
Fat-Tree Networks-on-Chips", Proceedings of the 4th International
Symposium on Electronic Design Test and Applications (DELTA-08), 23-25
January 2008, Hong Kong, China. (pdf)
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A. Bouhraoua and Mohammed
E.S. El-Rabaa, “An Efficient Network-on-Chip Architecture Based on the Fat
Tree (FT) Topology”, Arabian Journal of Science and Engineering (AJSE),
(pdf)
-
A. Bouhraoua, “Design
Feasibility Study for a 500 Gbits/s AES Cypher/Decypher Engine”, Arabian
Journal of Science and Engineering, under review.
(pdf)
-
A. Bouhraoua, “Design
Feasibility Study For a 500 Gbits/s AES Cypher/Decypher Engine”,
Proceedings of the International Conference on Microelectronics (ICM’06),
16-19 December 2006, Dhahran, Saudi Arabia
(pdf)
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A. Bouhraoua and Mohammed
E.S. El-Rabaa, “An Efficient Network-on-Chip Architecture Based on the Fat
Tree (FT) Topology”, Proceedings of the International Conference on
Microelectronics (ICM’06), 16-19 December 2006, Dhahran, Saudi Arabia
(pdf)
-
A. Bouhraoua and Mohammed
E.S. El-Rabaa, “A High-Throughput Network-on-Chip Architecture for
Systems-on-Chip Interconnect,” Proceedings of the International Symposium
on System-on-Chip (SOC06), 14-16 November 2006, Tampere, Finland.
(pdf)
(ppt
presentation)
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Bouhraoua, B.
Zerrouk & J. Faik, "Adaptive Message Routing for Compact Reconfigurable
Router", ICECS'97, December 15th-17th 1997, Cairo, Egypt
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B. Zerrouk, A.
Bouhraoua and F. Ilponse "Experimental Study of a Generic Router
Architecture under MILE", IASTED'97, February 17-20th 1997,
Innsbruck, Austria.
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B. Zerrouk and A.
Bouhraoua, "MILE: An Open Environment for Interconnection Networks
Performance Evaluation", Parallel and Distributed Computer Systems
Conference (PDCS'96), September 25-27th 1996, Dijon, France.
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B.
Zerrouk and A. Bouhraoua, "Evaluation of RCube Based Networks using MILE",
Esprit-OMI/MACRAME Project Report, June 1996.
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B.
Zerrouk and A. Bouhraoua, "MILE Software Architecture Overview and
Principles", Esprit-OMI/MACRAME Project Report, May 1996.
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B.
Zerrouk, A. Bouhraoua and A. Greiner,"Defining a New Component for the MILE
simulator", Esprit-OMI/MACRAME Project Report, March 1995.
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A.
Bouhraoua & A. Greiner, "A Portable SRAM Generator", International
Conference on Microelectronics (ICM'94), September 19th-21st 1994, Istanbul
Turkey
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Y.I. El-Haffaf, A.
Bouhraoua & A. Amari, "Design and Implementation of the Data-path of a
32-bits RISC Microprocessor: HRISC II", EURO-ASIC Conference, 1st-5th
June 1992, Paris France.
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Y.I. El-Haffaf, A.
Bouhraoua & A. Amari, "Micro-Architecture Design and Implementation of HRISC
II Microprocessor", EURO-ASIC Conference, 27th-31st May 1991, Paris
France.
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A. Bouhraoua, A. Amari, A.
Bellaouar, A. Afra & L. Sahli, "Micro-Architecture Design of HRISC II
Microprocessor", Proceedings of the International Conference on
Microelectronics (ICM'90), December 1990, Damas, Syria.
Current
and Past Projects
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"The
Design and Simulation of a Multi-core Vector Processor", KFUPM Project,
Co-Investigator, Jan. 2008 - Jan. 2010
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"Developing A Network-on-Chip for FPGAs", KFUPM Project, Co-Investigator,
Sept. 2007-Sept. 2009
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"Using
the On-Chip Advantage in Designing Networks-on-Chips", SABIC-Fast Track,
Principal Investigator, Sept. 2006 - July 2007 (proposal
- pdf)
Dr.
Abdelhafid Bouhraoua, Last Updated 09/07/2005