COE 561 Lectures
Digital System Design & Analysis
Aiman H. El-Maleh
Office: Building 22, Room 405-7, Phone: 2811
Schedule and Office Hours
COE 561 Home | Syllabus| Tools | Course Resources
Unit 1: Introduction
Unit 2: Combinationa & Sequential Circuit Design
Unit 3: Introduction to VHDL - Part I
Unit 4: Digital System Design Based on Data Path and Control Unit
Unit 5: Introduction to VHDL - Part II
Unit 6: Programmable Logic and Storage Devices
Unit 7: Synthesis of Combinational Circuits
Unit 8: Architectural Synthesis