King Fahd University of Petroleum & Minerals
College of Computer Sciences & Engineering

Department of Computer Engineering



COE 308: Computer Architecture (3-0-3)


Syllabus



Catalog Description

Memory hierarchy and cache memory. Integer and floating point arithmetic. Instruction and arithmetic pipelining, super-scalar architecture. Reduced instruction set computers. Parallel architectures and interconnection networks.

Prerequisite: COE 205.

Text Book:

Barry Wilkinson, "Computer Architecture: Design and Performance", Prentice-Hall, 1996.

Course Objectives:

(1) Know how to contrast machines based on thier the performance measures

(2) Master the basic issues involved in the design and analysis of computer memory hierarchy, pipeline architectures, and RISCs architectures.

(3) Appreciate the fundamental concepts involved in Parallel architectures and Interconnection networks
Course Learning Outcomes:
(1) To introduce students to the basic performance measures of computers.

(2) To introduce students to the design and analysis of computer memory hierarchy.

(1) To introduce students to the basic performance measures of computers.

(3) To introduce students to the design and analysis of pipeline architectures.

(4) To introduce students to the fundamental concepts in designing RISCs as compared to those of CISCs.

(5) To introduce students to the fundamental concepts in Parallel architectures and Interconnection networks 

 
Topics:

 



1. 
 Module #1: Introduction to CPU Performance Measures 


Basic concepts, CPU performance measures. Fundamentals of integer and
floating point arithemtic.





2. 
 Module #2: Memory System Design  


General principles, Cache memory, Virtual memory, Memory management,
Performance issues.





3. 
 Module #3: Pipeline Design Techniques  			


Basic concepts, Instruction pipelines, Arithemtic pipelines, Pipeline
hazards, Superscalar processors, Performance issues.





4. 
 Module #4: Reduced Instruction Set Computers 


Basic concepts, Semantic gap, RISC philosophy and design aspects, Common
characteristics of RISCs, Some examples, RISC versus CICS controversy.





5. 
 Module #5: Introduction to Parallel Architectures 


Basic concepts, SIMD & MIMD systems, Interconnection networks,
Performance issues.

Computer Usage:

None

Laboratory Experiments:

None

Grading Policy:

30% Quizzes and Homeworks
15% Major Exam I (Tentatively during week 5)
20% Major Exam II (Tentatively during week 10)
35% Final Exam (Scheduled by the Registrar)

ABET Category content:


Engineering Design: 2 credits or 50 %
Engineering Science: 2 credits or 50 %


Prepared by: Prof. Mostafa Abd-El-Barr. Date: September 2002.