By:
Masud-ul-Hasan
11
External
Interrupts
•External interrupt occurs as a result of a low-level or negative-edge on the INT0 or INT1 pin of 8051.
•Flags that generate these interrupts are bits IE0 and IE1 in TCON.
These are automatically cleared when the
CPU vectors to the interrupt.
•Low-level or negative-edge activated interrupts can be programmed through IT0 and IT1 bits
in TCON, i.e.,
ITx = 0 means low-level and ITx =
1 means negative-edge triggered.
