Chapter 3 Instruction Set Summary

By: Masud-ul-Hasan

Instruction Set : Arithmetic

Mnemonics Operands Bytes/Cycles

ADD A, Rn 1/1

ADDC A, direct 2/1

SUBB A, @Ri 1/1

A, #data 2/1

INC A 1/1

DEC Rn 1/1

direct 2/1

@Ri 1/1

INC DPTR 1/2

MUL AB 1/4

DIV AB 1/4

DA A 1/1

In Rn, n is 0..7. One of the four Register Banks is used (selected by RS0 and RS1 in PSW)

MOV PSW, #00011000B ; Select Register Bank 3

ADD A, R7 ; Add the contents of Register 7 to the Acc.

In Ri, i is 0 or 1.


	There are 4 banks of working registers, but only one is active at a time. A hardware reset enables bank 0, but a different bank is selected by modifying PSW bits 4 and 3 accordingly. E.g., MOV PSW, #00011000B activates register bank 3.