COE 301 - Computer Organization
Term 192 -  Spring 2020


Aiman H. El-Maleh


Office: Building 22, Room 405-7, Phone: 2811

Schedule and Office Hours

Syllabus | Lectures  | Lab | Tools and Manuals  | Course Resources


Catalog Description

Introduction to computer organization, machine instructions, addressing modes, assembly language programming, integer and floating-point arithmetic, CPU performance and metrics, non-pipelined and pipelined processor design, datapath and control unit, pipeline hazards, memory system and cache memory.

Prerequisite: COE 202 and ICS 201.



David A. Patterson and John L. Hennessy, Computer Organization & Design, The Hardware/Software Interface, Fifth Edition, Morgan Kaufmann Publishers, 2013.


Course Learning Outcomes

After successfully completing the course, students will be able to:

1.     Describe the instruction set architecture of a MIPS processor

2.     Analyze, write, and test MIPS assembly programs

3.     Describe organization and operation of integer and floating-point arithmetic units

4.     Design the datapath and control of a single-cycle (non-pipelined) CPU

5.     Design the datapath and control of a pipelined CPU and handle hazards

6.     Describe the organization and operation of memory and caches

7.     Analyze the performance of processors and caches



  Last Updated: Tuesday January 21, 2020, by Dr. Aiman El-Maleh