Flow Control (Branch) Instructions 

These instructions alter the flow of programs hence the name flow control

A transfer of control (i.e. a branch) other than the next one in sequence requires calculation of a target address

The branch instruction specifies the target address or how it is calculated, which is then loaded to the IP register replacing the normal address

Allowing more elaborate methods of branch target address calculation to match HLL constructs such as for, while, and repeat loops reduces the size of machine programs significantly at the cost of more complexity in CPU design.

If a special register is used for the target address, the CPU can prefetch the instruction at the branch target address making it ready for execution right after the branch instruction is executed

Branch instructions can be unconditional or conditional based on the values status flags or other registers or memory locations

The table below shows examples of branch instructions from different machines with different branch address calculation methods.

Examples of branch instructions from several machines

BLBS A, TgtBranch to address Tgt if the least significant bit at location A is setVAX11
bun r2Branch to location in r2 if the previous floating point comparison signaled that one or more of the values was not a numberPPC601
beq $2,$1,32Branch to location IP+4+32 if contents of registers $1 and $2 are equalMIPS R3000
SOB R4 LoopDecrement register R4 and branch to address Loop if result not equal 0DEC PDP11
JCXZ AddrJump to Addr if contents of CX = 0Intel 8086