| The IA32 started with the 80386 processor, which also boasted a new 32-bit address bus
| | The Pentium series enhanced performance further by increasing the data bus to 64-bits
| | IA32 processors kept backward compatibility, i.e. they can still run machine programs written for old 16-bit x86 generations
| | To use the 32-bit register, on of the following assembler directives has to be specified: .386 or .486 or .586
| | The following changes were implemented in the IA32 registers:
- General Purpose Registers:
| There are 8 data registers now named R0 to R7, shown in Figure 3.2 below
| | Eight 64-bit floating-point registers named FP0 to FP7 were added for holding 64-bit floating-point operands (see Figure 3.2)
| Fig. m010330.1 IA32 Data and Floating-point registers |
| | Registers R0 to R3 are also called EAX, ECX, EDX and EBX, respectively. These are the extended 32-bit version of the old x86 data registers
| | The lower 16-bits of these four registers can still be referenced as AX, CX, DX and BX for backward compatibility with the older x86 architecture. Also, the lowest 8-bits can be referenced as AL, CL, DL and BL while bits 9-15 can be referenced as AH, CH, DH and BH. This illustrated in Figure 3.3.
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| Fig. m010330.2 The extended IA32 data registers (backward compatibility with the old x86 is shown) |
- Segment Register:
| Segment registers are still 16-bits wide, i.e. the physical memory can have up to 64K segments
| | Two new data segment registers were added; FS and GS. So now a program can reference data in 4 different data segments
| | The other segment registers kept their old x86 names (CS, SS, DS and ES). Figure 3.4 shows the IA32 segment registers.
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| Fig. m010330.3 The IA32 Segment Registers |
- Pointer and Index Registers:
| The Instruction Pointer register is now 32-bits wide and addressed as EIP (extended IP) allowing for a code segment size of up to 4G words
| | The lower 16-bit of the EIP register are referenced as IP for compatibility with older x86 architecture
| | Data registers R4 to R7 can be used as extended pointer and index registers named as; ESP (extended stack pointer), EBP (extended base pointer), ESI (extended source index) and EDI (extended destination index), respectively
| | The lower 16-bits of these registers can still be referenced as SP, BP, SI, and DI for compatibility with the older x86 architecture.
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- Flag Register: This is an extended 32-bit (EFLAGS) register, with the lower 16-bits containing the regular x86 flags. Figure 3.5 below shows the IA32 Pointer, Index and Flags registers.
| Fig. m010330.4 IA32 Pointer, Index and FLAGS registers showing backward compatibility with older X86 architecture |
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