IEEE 10th International Conference on Electronics, Circuits and Systems (ICECS 2003), pages 72-75, University of Sharjah, United Arab Emirates, December 14-17, 2003
ELLIPTIC CURVE CRYPTOGRAPHIC PROCESSOR ARCHITECTURE BASED ON THREE PARALLEL GF(2k)
BIT LEVEL PIPELINED DIGIT SERIAL MULTIPLIERS
Adnan Abdul-Aziz Gutub
King Fahd University of Petroleum and Minerals
Unusual processor architecture for elliptic curve encryption is proposed in this paper. The architecture exploits projective coordinates (x=X/Z, y=Y/Z) to convert GF(2k) division needed in elliptic point operations into several multiplication steps. The processor has three GF(2k) multipliers implemented using bit-level pipelined digit serial computation. It is shown that this results in a faster operation than using fully parallel multipliers with the added advantage of requiring less area. The proposed architecture is a serious contender for implementing data security systems based on elliptic curve cryptography.