IEEE Workshop on Signal Processing Systems (SIPS’03), pages 93-98, Seoul, Korea, August 27-29, 2003

EFFICIENT SCALABLE HARDWARE ARCHITECTURE FOR MONTGOMERY INVERSE COMPUTATION IN GF(P)

Adnan Abdul-Aziz Gutub Computer Engineering Department King Fahd University of Petroleum and Minerals Dhahran 31261, SAUDI ARABIA Email: gutub@kfupm.edu.sa

Alexandre Ferreira Tenca Electrical & Computer Engineering Department Oregon State University Corvallis, Oregon 97331, USA Email: tenca@ece.orst.edu

Abstract:

The Montgomery inversion is a fundamental computation in several cryptographic applications. In this work, we propose a scalable hardware architecture to compute the Montgomery modular inverse in GF(p). We suggest a new correction phase for a previously proposed almost Montgomery inverse algorithm to calculate the inversion in hardware. The intended architecture is scalable, which means that a fixed-area module can handle operands of any size. The word-size, which the module operates, can be selected based on the area and performance requirements. The upper limit on the operand precision is dictated only by the available memory to store the operands and internal results. The scalable module is in principle capable of performing infinite-precision Montgomery inverse computation of an integer, modulo a prime number. This scalable hardware is compared with a previously proposed fixed (fully parallel) design showing very attractive results.