Project Title: Design of a Simulator of a Mutlimedia Processor
Efficient multimedia processing requires the following features:
(1) continous-media datastreams with narrow data organization,
(2) fine-grained parallelism, (3) high code locality,
(4) high memory and network bandwidth, and
(5) extensive data reorganization.
Traditional out-of-order superscalar microprocessors and hierarchical
memories are not adequate to support multimedia processing which
mainly requires guaranteeing worst case performance for dynamic
multimedia as opposed to current peak performance measures.
The storage of the data in main memory (DRAM) must be
directed by the access patterns of the used algorithms.
The first task of the project is to identify the access patterns of few
multimedia algorithms (like FFT, DCT, Haar, Median filtering and other MPEG)
with the objective of finding a storage that favors parallel access to
the data structure as needed by a given algorithm.
The second task of the project is to design and implement a simulator for
a processor-in-memory (PIM) microarchitecture that addresses the
The simulator will allow evaluation of the performance of the PIM
processor for a given storage and a given multimedia algorithm.
Project Code: MAM1.
Name of Supervisor Mayez Al-Mouhamed
Action Plan To be submitted
Progress Report To be submitted
Number of Semesters One or two
Co-requisite Computer Architecture