PSEN (pin 29): (Program Store Enable) enables
external program (code) memory. Usually connected to EPROM’s output enable
(OE). It pulses low during fetch stage of an instruction. It remains high
while executing a program from internal ROM.
ALE (pin 30): (Address Latch Enable) used for
demultiplexing the address and data bus when port 0 is used as the data bus
and low-byte of address bus.
EA (pin 31): (External Access) high to execute
programs from internal ROM and low to execute from external memory only.
Any location on general purpose RAM can be
accessed freely using direct or indirect addressing modes.
A, 5FH ;contents of 5FH location will be loaded in A
E.g., MOV R0,
#5FH ; value 5FH will be loaded in register R0 MOV A, @R0 ; data will be
loaded in A which is pointed ; at by R0
Powerful feature that bits can be set, cleared,
ANDed, ORed, etc. with a single instruction E.g., SETB
67H; to set bit 67H
Most microprocessors will do like MOV
A, 2CH ; read entire byte ORL A, #10000000B ; set
MOV 2CH, A ; write back entire byte
CY: (Carry Flag) is dual purpose: (1) As
traditional CY for arithmetic operations e.g., If A contains FFH then the
instruction ADD A, #1
leaves A equal to 00H and sets the CY in PSW. (A=00H & CY=1)
As Boolean accumulator e.g., ANL C, 25H ; ANDs bit 25H with the carry flag
and places the result back in the CY.
AC: (Auxiliary Carry Flag) used in addition of
BCD numbers, is set if a carry was generated out of bit 3 into bit 4. If
the values are added are BCD, then the add instruction must be followed by
DAA (decimal adjust accumulator) to bring results greater than 9 back into
F0: (Flag 0) is a general-purpose flag bit
available for user applications.
OV: (Overflow flag) is set after an addition or
subtraction operation if there was an arithmetic overflow. Results greater
than +127 or less than –128 will set OV bit.
P: (Parity Bit) automatically set or cleared
each machine cycle to establish even parity with the accumulator. Parity
bit is most commonly used in conjunction with serial port routines to
include a parity bit before or after the transmission.
RS1 & RS0 are used to select different
B Register: (at F0H) also bit addressable and
used along with the accumulator for multiply & divide operations.
A B instruction multiplies the 8-bit unsigned values in A & B and
leaves the 16-bit result in A (low-byte) & B (high-byte)
A B instruction divides A by B leaving the integer result in A and
remainder in B.
SP: (Stack Pointer) (at 81H) is an 8-bit
register contains the address of the data item currently on the top of
stack. Its operations include “Pushing” & “Popping” data from the
DPTR: (Data Pointer) is 16-bit register at 82H
(DPL, low-byte) and 83H (DPH, high-byte) used to access external code or
data memory. It can be specified by its 16-bit name, DPTR, or by each
individual byte name, DPH and DPL.