COE 202 - Term 161

(Last edited: Sunday, January 01, 2017 11:39:41 AM)

Office Hours:   U/T/R   11:00 AM - 11:55 AM or by appointment

• Announcements:

1. Check your attendance so far and your scores so far.
2. Quiz # 01 will be on Sunday 09/10/2016.
3. Quiz # 02 will be on Sunday 16/10/2016.
4. Major Exam I will be on Saturday 22/10/2016 at 01:00 PM at room 22-132. The exam includes Class Notes of Topic 1, Topic 2 (all), Topic 3 (Combinational Logic-1 and Combinational Logic-2 only), and Propagation Delay Calculation.
5. Help session by Dr. Elrabaa will be held on Thursday 20/10/2016 at 12:05 PM at room 24-151.
6. Major Exam I solution.
7. Quiz # 03 will be on Tuesday 22/11/2016.
8. Quiz # 04 will be on Thursday 01/12/2016.
9. Major Exam II will be on Saturday 03/12/2016 at 01:00 PM at room 22-119.The exam includes Class Notes of Topic 3 (Intro to Verilog-1, Combinational Logic-3, and Combinational Logic-4), and Topic 4 (all).
10. Major Exam II solution.
11. Check out the additional sequential circuit analysis and design examples.
12. Quiz # 05 will be on Thursday 29/12/2016.

• Class Notes:

   

  Topic 1: Introduction	Topic 3: Combinational Logic-1	Topic 3: Combinational Logic-3	Topic 4: Combinational Circuits-3	Topic 6: Sequential Circuits-2
  Topic 2: Number system-1	Topic 3: Combinational Logic-2	Topic 3: Combinational Logic-4	Topic 4: Combinational Circuits-4	Topic 6: Sequential Circuits-3
  Topic 2: Number system-2	Propagation Delay Calculation	Topic 4: Combinational Circuits-1	Topic 5: Intro to Verilog-2	Topic 6: Sequential Circuits-4
  Topic 2: Number system-3	Topic 3: Intro to Verilog-1	Topic 4: Signed Numbers	Topic 6: Sequential Circuits-1	Topic 7: Memory
  		Topic 4: Combinational Circuits-2		Topic 8: Intro to Verilog-3    (add. material)

   

• Homeworks: (Late submission NOT accepted)

    HW # 01    HW # 01 Solution                                    Verilog Assignment # 01

    HW # 02    HW # 02 Solution                                    Verilog Assignment # 02

    HW # 03    HW # 03 Solution

    HW # 04    HW # 04 Solution

    HW # 05    HW # 05 Solution

 

• Quiz Solution:

    Quiz # 01 Solution

    Quiz # 02 Solution

    Quiz # 03 Solution

    Quiz # 04 Solution

    Quiz # 05 Solution

 

• Miscellaneous:

    Course Syllabus

    Previous Exams (courtesy of Dr. Aiman El-Maleh)

    Verilog Simulator

    Support Material (PDF files)

    Sequential Circuit Analysis (courtesy of Dr. M. Mudawar)        Sequential Circuit Design (courtesy of Dr. M. Mudawar)

    K-Map Minimizer Tool

    LogicWorks Tool    LogicWorks Tutorial   LogicWorks Example (7-Segment Display)

    Attendance so far            Scores so far

Free Counters