Design and implementation of CRC





Project Start:
Project Finish:
Tue 3/5/02
Sat 5/18/02


Tasks


ID
Task Name
DurationStartFinishResource Names% Complete
1
Prepare an action plan
5 daysTue 3/5/02Mon 3/11/02Group0%
2
Problem analysis and survey of different options
7 daysTue 3/12/02Wed 3/20/02Group0%
3
System Design and Segmentation
7 daysSat 3/23/02Sun 3/31/02Group0%
4
Design of the Control unit
0 daysTue 4/23/02Tue 4/23/02 0%
5
Selection of a control scheme
3 daysMon 4/1/02Wed 4/3/02Ahmad0%
6
Logic Design of CU
4 daysSat 4/6/02Tue 4/9/02Ahmad0%
7
FPGA synthesis of CU
4 daysWed 4/10/02Mon 4/15/02Ali0%
8
CU Testing
5 daysTue 4/16/02Mon 4/22/02Ali0%
9
Design of the execution unit
0 daysTue 4/23/02Tue 4/23/02 0%
10
Data path design
5 daysTue 4/9/02Mon 4/15/02Ahmad0%
11
Design of the register file
4 daysWed 4/10/02Mon 4/15/02Ali0%
12
Design of the Bus arbitration Unit
4 daysWed 4/10/02Mon 4/15/02Ahmad0%
13
Design of the TLB unit
5 daysSun 5/12/02Sat 5/18/02Ali0%
14
Integration of the EU
5 daysTue 4/16/02Mon 4/22/02Ali0%
15
System Integration
6 daysTue 4/23/02Tue 4/30/02Group0%
16
Testing and Debuging
6 days?Wed 5/1/02Wed 5/8/02Group0%
17
Final Report
6 daysSat 5/11/02Sat 5/18/02Group0%

Resources


IDNameGroupMax UnitsPeak Units
1Group 100%100%
2Ahmad 100%200%
3Ali 100%200%

Assignments


Task IDTask NameResource NameWorkStartFinish% Work Complete
1Prepare an action planGroup40 hrsTue 3/5/02Mon 3/11/020%
2Problem analysis and survey of different optionsGroup56 hrsTue 3/12/02Wed 3/20/020%
3System Design and Segmentation Group56 hrsSat 3/23/02Sun 3/31/020%
5Selection of a control schemeAhmad24 hrsMon 4/1/02Wed 4/3/020%
6Logic Design of CUAhmad32 hrsSat 4/6/02Tue 4/9/020%
7FPGA synthesis of CUAli32 hrsWed 4/10/02Mon 4/15/020%
8CU TestingAli40 hrsTue 4/16/02Mon 4/22/020%
10Data path designAhmad40 hrsTue 4/9/02Mon 4/15/020%
11Design of the register fileAli32 hrsWed 4/10/02Mon 4/15/020%
12Design of the Bus arbitration UnitAhmad32 hrsWed 4/10/02Mon 4/15/020%
13Design of the TLB unitAli40 hrsSun 5/12/02Sat 5/18/020%
14Integration of the EUAli40 hrsTue 4/16/02Mon 4/22/020%
15System IntegrationGroup48 hrsTue 4/23/02Tue 4/30/020%
16Testing and DebugingGroup48 hrsWed 5/1/02Wed 5/8/020%
17Final ReportGroup48 hrsSat 5/11/02Sat 5/18/020%


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