|Education||Employment History||Industrial Experience||Research Interests||patents|
A) Granted Patents:
P1- Amin, A. and Brennan, J. “Electrically reprogrammable EPROM cell with merged transistor and optimum area,” US Patent No. 5,455,793, October 3, 1995.
P2- Amin, A. and Brennan, J. “Electrically reprogrammable EPROM cell with merged transistor and optimum area,” US Patent No. 5,293,328, March 8, 1994 and European Patent Office; No. EP0551728-, February 1993, Japanese Patent No. JP5275709, 1993.
P3- Amin, A. and Emoto, Bernard "A High Speed Sense Amplifier for EPROM Single Transistor Memory Cell," US Patent No. 5,117,394, May 26, 1992; European Patent No. EP0370432, May 1990. Japanese Patent No. JP2252196, 1990.
P4- Amin, A. "A Novel Architecture for Flash Erase EPROM Memory," US. Patent No. 4,999,812, March 1991; European Patent No. EP0370416 May 1990, Japanese Patent No. JP3155667, 1991.
B) Pending Patents:
P5- Amin, Alaaeldin and Mahmoud, Muhammad “Apparatus and Method for High-Speed Modulo Multiplication and Division,”.
P6- Amin, Alaaeldin and Shinwari, M. W. “Apparatus And Method For A Novel High-Radix Multiplierdivider,”.
P7- Al-Somani, Turki F. and Amin, Alaaeldin “Method For Elliptic Curve Scalar Multiplication,”
C) Patents in Preparation:
P8- Amin, Alaaeldin “A high-speed area-efficient carry chain,” in preparation.
P9- Elshafei, Abdul-Rahman and Amin, Alaaeldin “An Apparatus and Method for Online Multiplication with High-Radix Redundant Output,”