A microcded control unit with branching can be designed with the following structured design:

Fig. m300152.1 Organization of Microprogrammed Control Unit with Branching

This structured microprogrammed control unit design has the following main components:

	A uPC to hold the address of the next contol word or microinstruction to be fetched from the control store.
	An incrementer to increment the uPC.
	A Control Store to store the microroutines for all the instructions.
	A microinstruction register (uIR), to hold the fetched microinstruction.
	A programmable logic array (PLA), serving as a lookup table mapping the opcode filed of IR to the starting address of the microroutine of the executed instruction.
	A 4x1 Multiplexer. The uPC can be loaded from four different sources by the 4x1 Multiplexer: The incremented uPC. The output of the PLA. An external source. This allows the uPC to be initialized to a starting value to begin instruction fetch, interrupt service, or reset. Branch address field from the current microinstruction. This allows unconditional and conditional microbranches.
	A Sequencer. This is a combinational circuit that controls the 4x1 multiplexer select lines based on the microbranch control signals driven from the microinstruction and the condition codes and flags.

Control Word Format

The control store contains three kinds of fields in each control word:

	Control signal field, C bits: used to store the control signals such as PCin, MARout, etc., with 1 bit for each control signal.
	Branch address field, n bits: used to store the microbranch address, where n is the number of bits in the uPC.
	Branch control field, k bits: contains various signals to control branching in microcoded control unit.

An example of a control store with m-bits wide control word is shown below:

Fig. m300152.2 Control Store Example

Branching Controls

A detailed description of the branching control signals in the structured microprogrammed control unit design is illustrated below:

Fig. m300152.3 Organization of Microprogrammed Control Unit with Branching Controls

The first 2 bits in the control word specify which multiplexer input is to be selected

	00: Increment uPC
	01: PLA
	10: External address
	11: Branch address

The next 5 bits select the condition under which the multiplexer input is selected

	BrUn: Branch unconditionally
	BrNotZ: Branch if the Zero Flag is equal to 0
	BrZ: Branch if the Zero Flag is equal to 1
	BrNotN: Branch if the Sign Flag is equal to 0
	BrN: Branch if the Sign Flag is equal to 1

Based on these 7 bits, the sequencer can be designed to control the selection of the 4x1 multiplexer. For example, branches can be formed by choosing one alternative form from each of the following lists:

         {NotN               }             
         {N                  }    {PLA             }
 Br      {NotZ               }    {External Address}
         {Z                  }    {Branch Address  }
         {Unconditionally    }

Microcode Branching Example

The following table illustrates a microcode branching example:

Address	Mux Select (MS1 MS0)	BrUn	BrNotZ	BrZ	BrNotN	BrN	Control Signals	Branch Address	Branching Action
200	00	0	0	0	0	0	. . .	xxx	None -- 201 next
201	01	1	0	0	0	0	. . .	xxx	To output of PLA
202	10	0	0	1	0	0	. . .	xxx	To external address if Z=1 else to address 203
203	11	0	0	0	0	1	. . .	300	To 300 if N=1 else to address 204
204	11	0	0	0	1	0	0. . .0	206	To 206 if N=0 else to address 205
205	11	1	0	0	0	0	. . .	204	Br to 204

Note that the address fileds are specified in decimal. All others are in binary. Also note that xxx represents a Don't care, which indicates that the branch address is not used. The following is a description of the brabching action taken by each control word in the above example:

	Control word at address 200: Since the Mux Select bits are 00, the uPC incrementer is selected.
	Control word at address 201: Mux setting of 01 selects PLA output address and unconditionally since BrUn=1.
	Control word at address 202: Has Mux setting of 10 and BrZ bit set. So the branch will be taken to address on external lines provided the Z signal is set.
	Control word at address 203: Branch to microaddress 300 if the N bit is set.
	Control words at address 204 and 205: Implement a while loop. Note that the control signals are zero at address 204, since this CW just implements a test.