1. Instructions that utilize registers for operands' storage execute much faster than instructions that utilize the main memory for operand storage. |
True |
False
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2. Registers are connected to other units in the CPU through an internal .
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3. Older x86 processors had register sizes of 20-bits. |
True |
False
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4. Newer IA32 processors wont run old programs written for older x86 processors due to their different register sizes. |
True |
False
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5. The register hold an operand to an arithmetic operation and the result of the operation.
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6. The lower 8-bits of the AX register can be addressed as: |
AH |
BH |
BL |
AL
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7. The register acts as a counter for repeating or looping instructions.
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8. The extended AX (EAX) register in the Pentium processor is also named .
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9. The BX register is used in multiplication operation to hold the upper 16-bits of the result. |
True |
False
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10. Memory segmentation (partitioning) was necessary because the x86 registers were 16-bits and could not hold the 20-bit addresses of the main memory. |
True |
False
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11. Since the x86 has an address bus of 20-bits, its memory is segmented into 1 M segments (i.e. 2 20). |
True |
False
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12. A memory location within a memory segment is referenced by specifying its offset from the end of the segment. |
True |
False
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13. Each logical address maps to a unique physical address. |
True |
False
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14. Each logical address maps to a unique physical address. |
True |
False
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15. The logical address F00F:1000h translates to the physical address: |
1F00Fh |
F10F0h |
1000Fh |
F100Fh
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16. The physical address 0000Ah is common to: |
one segment only |
two segments |
four segments |
64K segments
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17. The segment number where the physical address 0FFFFh has an offset of FFFFh is: |
A123h |
FFFFh |
0000h |
0FFFh
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18. The segment number where the physical address 0FFFFh has an offset of 000Fh is: |
A123h |
FFF0h |
0FF0h |
0FFFh
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19. Machine language programs are usually divided into three segments; code segment, segment and stack segment.
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20. The CPU uses the stack segment to implement procedural calls. |
True |
False
|
21. The register that contains the segment number for the code segment is: |
CS |
BX |
SS |
DS
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22. Memory segments are implemented such that they do not overlap to avoid mixing the different program segments. |
True |
False
|
23. If the contents of some of a CPU registers are as follows:
Register Name | Contents (hex)
| AX | C023
| BX | 1000
| CX | A628
| DX | EF05
| CS | 7FF0
| DS | 1FF0
| SS | 1000
| ES | 11F0
| SP | 0020
| IP | 765F
| Flags | 1155
|
The contents of the AH register is:
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|
|
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24. Referring to the table in question 23, the value of the sign flag is 0. |
True |
False
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25. Referring to the table in question 23, the value of the carry flag is 0. |
True |
False
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26. Referring to the table in question 23, the value of the zero flag is 1. |
True |
False
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27. Referring to the table in question 23, the result of adding AL to BH would be: |
|
|
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28. As a result of the operation in question 27 above, the contents of the flag bits S, Z, and C would be:
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|
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29. Referring to the table in question 23, the physical address of the next instruction to be fetched from the main memory is:
|
765F0h |
8755Fh |
7FF00h |
A6280h
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30. Referring to the table in question 23, the physical address of the top of the stack is:
|
865F0h |
8675Fh |
7FF00h |
10020h
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31. This means that the number of words in the stack are:
|
1FF0h |
1000h |
32 |
Non of the above
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32. In the Pentium processor, data register R3 refers to the extended BX register. |
True |
False
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33. In IA32 processors, the stack pointer register (SP) is stored in lower 16-bits of register R5. |
True |
False
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34. In IA32 processors, the number of segment registers was increased to 6 registers, but their width remained 16-bits. |
True |
False
|
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