A computer system consists of a Central Processing Unit (CPU), main memory and Input/Output Devices interconnected through buses. A CPU is decomposed into two main parts: the data path and the control unit. The data path consists of the set of registers, arithmetic blocks and interconnections required to accomplish the changes an instruction makes when executed. The flow of data between registers in the CPU or between a register and a memory location occurs in the data path. Also, arithmetic operations are performed in the data path. The data path is controlled by a set of signals to cause actions to take place. Examples of such signals are strobe signals to load registers and signals to control the connectivity of outputs to a bus.

In order to perform an operation on the data path, it is required to generate the control signals in the correct order to affect the correct data path activity. The figure below shows the block diagram of a computer subsystem.

Fig. m300110.1 Block Diagram of a Computer Subsystem

The control unit receives signals that describe the state of the data path and the control unit sends control signals to the data path. These signals control the data flow within the CPU, and between the CPU and main memory and input/output.

As can be seen from the figure, the data path in the CPU is designed based on a single bus. It consists of a set of general purpose registers, Arithmetic and Logic Unit (ALU), Program Counter (PC), Instruction Register (IR), Memory Address Register (MAR), Memory Data Register (MDR), and two auxiliary registers, Y and Z, that are required to temporarily store one operand and the result when doing ALU operations. MAR and MDR registers are used as interface registers to the memory system. MAR contains the address of the memory operand, and is connected to the address bus. MDR is used as a buffer for outgoing and incoming values and is connected to the data bus.